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<h1 class="nist-page__title">Frequently Asked Questions: Facilities for Semiconductor Materials and Manufacturing Equipment</h1>
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<div class="nist-block text-long"><p><span>Note that in questions and answers below, “NOFO 1” refers to the </span><a class="media-link-ga " data-entity-substitution="canonical" data-entity-type="media" data-entity-uuid="2da7545e-53ca-4ead-8cc1-4176ad3d35c1" data-file-url="/system/files/documents/2024/04/19/Amended%20CHIPS-Commercial%20Fabrication%20Facilities%20NOFO%20Amendment.pdf" href="/document/notice-funding-opportunity-chips-incentives-program-commercial-fabrication-facilities" title="Notice of Funding Opportunity: CHIPS Incentives Program - Commercial Fabrication Facilities"><span>CHIPS Incentives Program – Commercial Fabrication Facilities Notice of Funding Opportunity</span></a><span>, and “Small-Scale Supplier NOFO” refers to the </span><a class="media-link-ga " data-entity-substitution="canonical" data-entity-type="media" data-entity-uuid="fe44fdc2-acce-4679-8932-b7bc44d12328" data-file-url="/system/files/documents/2023/09/29/CHIPS%20-%20Facilities%20for%20Semiconductor%20Materials%20and%20Manufacturing%20Equipment%20NOFO.pdf" href="/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo" title="CHIPS - Facilities for Semiconductor Materials and Manufacturing Equipment NOFO"><span>CHIPS Incentives Program – Facilities for Semiconductor Materials and Manufacturing Equipment Notice of Funding Opportunity</span></a><span>.</span></p><h2><span>Sections</span></h2><div class="grid-row grid-gap"><div class="tablet:grid-col"><h4><a href="#gen"><strong>General</strong></a></h4><h4><a href="#fullapp"><strong>Full Application</strong></a></h4><h4><a href="#prog"><strong>Program Priorities</strong></a></h4></div><div class="tablet:grid-col"><h4><a href="#elig"><strong>Eligibility</strong></a></h4><h4><a href="#app"><span><strong>Application Logistics</strong></span></a></h4><h4><a href="#cons"><span><strong>Consortium Logistics</strong></span></a></h4></div><div class="tablet:grid-col"><h4><a href="#state"><strong>For States and Local Governments</strong></a></h4><h4><a href="#work"><span><strong>Workforce</strong></span></a></h4><h4><a href="#awa"><span><strong>Award Sizing</strong></span></a></h4></div></div><h2 class="nist-block__title"><a class="ck-anchor" id="gen"></a><span>General</span></h2></div>
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<div class="text">I am an upstream semiconductor supply chain company. Should I apply for funding under the second funding opportunity (Facilities for Semiconductor Materials and Manufacturing Equipment) or the first (Commercial Fabrication Facilities)?</div>
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<div class="OutlineElement Ltr SCXW130379080 BCX0"><p class="Paragraph SCXW130379080 BCX0"><span lang="EN-US">Assuming your project meets the other eligibility requirements laid out in the funding opportunities, the distinction between the first NOFO and the second comes down to the size of your proposed project. If your project involves capital investments of $300 million or more, you must apply under the first funding opportunity. If your project involves capital investments of below $300 million, you must apply under the second funding opportunity.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW130379080 BCX0"><p class="Paragraph SCXW130379080 BCX0"><span lang="EN-US">For more information on eligibility requirements for each funding opportunity, see Sections I.B.1 and I.B.2 (“What facilities are eligible for funding under this NOFO?” and “What are the eligibility requirements for funding under this NOFO?”) of </span><a class="Hyperlink SCXW130379080 BCX0" href="https://www.nist.gov/document/notice-funding-opportunity-chips-incentives-program-commercial-fabrication-facilities"><span lang="EN-US">NOFO 1</span></a><span lang="EN-US"> or Sections I.B.1 and I.B.2 (same) of the </span><a class="Hyperlink SCXW130379080 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p></div>
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<div class="nist-block text-long"><h2 class="nist-block__title"><a class="ck-anchor" id="fullapp"></a><span>Full Application</span></h2></div>
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<div class="text">How many projects applied for the NOFO and how many made it to the Full Application stage?</div>
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<p><span lang="EN-US">The CHIPS Program Office received 165 Concept Plans representing over $13 billion in capital investment across 30 states. Upon evaluation and selection, CPO was only able to select 30% of projects (53 projects) to advance to the Full Application stage.</span><span>&nbsp;</span></p>
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<div class="text">How were those decisions made?</div>
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<p><span lang="EN-US">After a completeness and eligibility scan, the CHIPS Program Office conducted a merit assessment of all Concept Plans review based on the five Evaluation Criteria (see Section V.A and V.D.1 of the </span><a class="Hyperlink SCXW148530799 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">) and nine Selection Factors (see Section V.B of the Small-Scale Supplier NOFO). The Department has reserved up to $500 million for the Small-Scale Supplier NOFO, and wanted to ensure that projects undertaking the burden of a Full Application were likely to be successful in receiving an award. The 53 applications advancing to the Full Application stage represent roughly $6 billion in capital expenditures. Based on CPO’s general expectation that awards will be 10% of capital expenditures, CPO will continue to make trade-offs to stay within the $500 million constraint.</span><span>&nbsp;</span></p>
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<div class="text">Where can I find application information?</div>
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<p><span lang="EN-US">Application information can be found at on the </span><a class="Hyperlink SCXW31335224 BCX0" href="https://www.nist.gov/chips"><span lang="EN-US">CHIPS website</span></a><span lang="EN-US"> and the </span><a class="Hyperlink SCXW31335224 BCX0" href="https://applications.chips.gov/s/"><span lang="EN-US">CHIPS Incentives Application Portal</span></a><span lang="EN-US">. For further details on the application process and submission requirements, please refer to the </span><a class="Hyperlink SCXW31335224 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">. All application materials must be submitted through the </span><a class="Hyperlink SCXW31335224 BCX0" href="https://applications.chips.gov/s/"><span lang="EN-US">CHIPS Application Portal</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">Applicants that are invited to the Full Application phase may submit Full Application materials until July 1, 2024, at 5:00PM ET. For more information on each stage, see Section I.B.8 (“How does the application process work?”) and Section V (“Application Review Information”) of the </span><a class="Hyperlink SCXW164253955 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">In the Full Application stage, the applicant should be prepared to submit “Sources and Uses of Funds” information that details costs and capital sources for each project; audited company financials; a summary financial model with project cash flows, including an income statement and balance sheet information; and detail on the applicant’s incentive request from the CHIPS Incentives Program. Please note that the Full Application requires financial information beyond what was required for the Concept Plan including: a financial model, operating losses and other cash outflows, workforce development costs, and other uses of funds. Applicants may submit their own financial model but have the option of using the linked Financial Model Template. Please note that in this </span><a class="Hyperlink SCXW40096033 BCX0" href="https://www.nist.gov/document/nofo2-financial-model-template"><span lang="EN-US">link</span></a><span lang="EN-US"> we are providing an updated financial model template compared to the financial model template referenced in the </span><a class="Hyperlink SCXW40096033 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">. We encourage applicants to use this updated version. For more detailed information, see Section IV.H.8 (“Financial Information”) of the </span><a class="Hyperlink SCXW40096033 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, as well as the </span><a class="Hyperlink SCXW40096033 BCX0" href="https://www.nist.gov/document/nofo2-full-application-instructions"><span lang="EN-US">Full Application Instructions</span></a><span lang="EN-US">, </span><a class="Hyperlink SCXW40096033 BCX0" href="https://www.nist.gov/document/nofo2-financial-model-template"><span lang="EN-US">Financial Model Template</span></a><span lang="EN-US">, and </span><a class="Hyperlink SCXW40096033 BCX0" href="https://www.nist.gov/document/nofo2-financial-model-template-instructions"><span lang="EN-US">Financial Model Template Instructions</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">Full Application invitations were sent on April 26, 2024, and all Full Applications must be submitted by July 1, 2024, at 5:00PM ET. Following that, applications will proceed to a Full Application Review phase and, if applicable, a due diligence phase. The duration of these processes will vary from project to project and will depend on the nature and quality of each application. For a more detailed discussion of the application review and selection process, see Section 1.B.8 (“How does the application process work?”) of the Small-Scale Supplier NOFO.&nbsp;&nbsp;</span><span>&nbsp;</span></p>
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<div class="text">How will the CHIPS Program Office interact with applicants during evaluation? Will the CHIPS Program Office contact me if it needs more information to evaluate my application?</div>
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<p><span lang="EN-US">Prior to the submission deadline for the Full Application, the CHIPS Program Office will schedule meetings with each applicant to discuss the evaluation process. Additionally, the Department may contact applicants at any point during the process to obtain additional or clarifying information or to provide feedback or recommendations for improvement. The review process may include interviews with applicants and consultation with outside contractors or experts if deemed necessary to assist in the merit assessment. Applicants should be diligent in ensuring that their applications are responsive to the requirements set out Sections IV.E, IV.F, and IV.H in the </span><a class="Hyperlink SCXW162664774 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">. Full Applications will be reviewed upon receipt to determine eligibility, completeness, and responsiveness to these requirements. Full Applications determined to be ineligible, incomplete, or nonresponsive will be returned to the applicant.</span><span>&nbsp;</span></p>
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<div class="text">How do I ensure I meet all statutory requirements for the Full Application?</div>
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<p><span lang="EN-US">Applicants must understand the statutory requirements and should reference Section I.B.2 (“What are the eligibility requirements for funding under this NOFO?”) of the </span><a class="Hyperlink SCXW203127426 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">. Applicants may also refer to the </span><a class="Hyperlink SCXW203127426 BCX0" href="https://www.nist.gov/document/nofo2-full-application-narrative-guidance"><span lang="EN-US">Full Application Narrative Guidance</span></a><span lang="EN-US"> for additional support on some of the requirements. Applicants should make sure their applications are compliant with the statutory requirements with documentation where necessary. Applicants are required to:</span><span>&nbsp;</span></p><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Be covered entities seeking incentives for investment in the construction, expansion, or modernization of facilities and equipment in the United States to produce materials used to manufacture semiconductors or semiconductor manufacturing equipment.&nbsp;</span><span>&nbsp;</span></p></li></ol></div><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1" start="2"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Have been offered a covered incentive</span><span>&nbsp;</span></p></li></ol></div><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1" start="3"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Have made commitments to worker and community investments</span><span>&nbsp;</span></p></li></ol></div><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1" start="4"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Have secured commitments from regional educational and training entities</span><span>&nbsp;</span></p></li></ol></div><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1" start="5"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Have an executable plan to sustain facility without CHIPS funding,&nbsp;</span><span>&nbsp;</span></p></li></ol></div><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1" start="6"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Have documented its workforce needs and produced a strategy to meet such needs</span><span>&nbsp;</span></p></li></ol></div><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1" start="7"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Have determined the type of semiconductor technology produced at the proposed facility</span><span>&nbsp;</span></p></li></ol></div><div class="ListContainerWrapper SCXW133551337 BCX0"><ol type="1" start="8"><li><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Have developed an executable plan to identify and mitigate relevant semiconductor supply chain security risks.&nbsp;</span><span>&nbsp;</span></p></li></ol></div><div class="OutlineElement Ltr SCXW133551337 BCX0"><p class="Paragraph SCXW133551337 BCX0"><span lang="EN-US">Applicants should make sure to describe how they have satisfied these statutory requirements in the eligibility web form section in the </span><a class="Hyperlink SCXW133551337 BCX0" href="https://applications.chips.gov/"><span lang="EN-US">application portal</span></a><span lang="EN-US">.&nbsp;</span><span>&nbsp;</span></p></div>
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<p><span lang="EN-US">Each applicant must provide a letter from a state or local government entity offering a qualifying covered incentive, indicating the estimated size and nature of the incentive. The offer of a covered incentive may be contingent; if so, any contingencies need to clearly be specified in the letter. Prior to receiving a CHIPS Incentives Award, the applicant may be required to provide additional information demonstrating to the Department’s satisfaction that the covered incentive has been or will be received. For consortium members, this requirement may be satisfied by one letter that names and offers an incentive to all eligible facilities in the consortium being proposed for construction, expansion, or modernization. However, that the Department will also accept multiple letters. See more information in Sections I.B.5 (“Are there any benefits to applying as part of a consortium?”) and IV.H.3 (“Covered Incentive”) of the </span><a class="Hyperlink SCXW261486599 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a>.</p>
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<p><span lang="EN-US">Yes. Applicants may join a consortium and apply as one in their Full Application if they did not apply as one in the Concept Plan. The applicant must still submit a consortium narrative that is separate from their application narrative. If applying as part of a consortium for the first time during the Full Application phase, applicants will be prompted to enter the consortium key generated from the Concept Plan phase if available, or if unavailable, enter the consortium information. If applying as a consortium for the first time during the Full Application phase, CPO highly recommends that applicants refer to information on applying as a consortium in the </span><a class="Hyperlink SCXW261486599 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, the </span><a class="Hyperlink SCXW261486599 BCX0" href="https://www.nist.gov/document/consortium-narrative-guidance"><span lang="EN-US">Consortium Narrative Guidance</span></a><span lang="EN-US">, </span><a class="Hyperlink SCXW261486599 BCX0" href="https://www.nist.gov/document/notice-funding-opportunity-small-scale-supplier-projects-fact-sheet"><span lang="EN-US">Small-Scale Supplier NOFO Fact Sheet</span></a><span lang="EN-US">, and prior </span><a class="Hyperlink SCXW261486599 BCX0" href="https://www.nist.gov/chips/chips-america-webinars"><span lang="EN-US">Small Scale Supplier webinars and Q&amp;A sessions</span></a><span lang="EN-US">. When reviewing a consortium narrative, the Department will consider the extent to which a given project is necessary for achieving its vision.</span><span>&nbsp;</span></p>
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<div class="text">If I am denied funding in the Full Application or choose to not submit a Full Application, may I resubmit or submit a Full Application later?</div>
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<p><span lang="EN-US">At this time, the Small-Scale Supplier NOFO is not accepting Full Applications outside of this funding window. Because the Concept Plan stage has concluded and the window to submit a Full Application will not reopen after July 1, 2024, as of now, there will not be another chance to apply to this funding opportunity.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">The CHIPS Program Office and the Department recognize that protecting confidential business information from public disclosure is important both to applicants and to the success of the program. Please see </span><a class="Hyperlink SCXW130882739 BCX0" href="https://www.nist.gov/chips/handling-confidential-information"><span lang="EN-US">Handling of Confidential Information</span></a><span lang="EN-US"> for more information.</span><span>&nbsp;</span></p>
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<div class="text">Could you explain the scope of the disclosure restriction on applicants who receive invitations to the Full Application process and who submit a Full Application?</div>
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<p><span lang="EN-US">The CHIPS Incentives Program </span><a class="Hyperlink SCXW15703565 BCX0" href="https://applications.chips.gov/"><span lang="EN-US">application portal</span></a><span lang="EN-US"> requires an applicant has submitted a Concept Plan or Full Application to agree that neither the applicant nor any of its affiliates will issue any press release or otherwise publicly disclose the status of the Concept Plan or Full Application or the contents of any communications with the CHIPS Program Office or the Department of Commerce without the CHIPS Program Office’s prior written consent. The disclosure restriction applies to the public disclosure of any and all communications, including regarding the status of a submission, sent by the CHIPS Program Office to the applicant or affiliate. It does not apply to the public disclosure of communications, including the fact of submission, authored and sent by the applicant or its affiliate to the CHIPS Program Office.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">Yes. The recipients and amounts of Federal financial assistance awards will be made public after the awards are made.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">CPO recommends using the newly updated </span><a class="Hyperlink SCXW121085890 BCX0" href="https://www.nist.gov/document/nofo2-financial-model-template"><span lang="EN-US">Financial Model Template</span></a><span lang="EN-US"> and accompanying </span><a class="Hyperlink SCXW121085890 BCX0" href="https://www.nist.gov/document/nofo2-financial-model-template-instructions"><span lang="EN-US">Financial Model Template Instructions</span></a><span lang="EN-US"> for the Full Application. This template is updated from the Financial Model Template referenced in the </span><a class="Hyperlink SCXW121085890 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">. The use of either of these financial model templates is optional; however, the Full Application requires the submission of a completed financial model.</span><span>&nbsp;</span></p>
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<div class="text">Am I still eligible for funding if construction for my project has already begun?</div>
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<div class="OutlineElement Ltr SCXW261517476 BCX0"><p class="Paragraph SCXW261517476 BCX0"><span lang="EN-US">The CHIPS Act provides that funding is available to covered entities “to incentivize investment in facilities and equipment in the United States” for the fabrication, assembly, testing, advanced packaging, or production of semiconductors, materials used to manufacture semiconductors, or semiconductor manufacturing equipment. Applicants must therefore demonstrate how the CHIPS incentives requested will incentivize the applicant to make investments in facilities and equipment in the United States that would not occur in the absence of CHIPS incentives.&nbsp;</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW261517476 BCX0"><p class="Paragraph SCXW261517476 BCX0"><span lang="EN-US">For applications containing projects that have already been announced or begun construction, this standard could be met by demonstrating that the CHIPS incentives requested will enable the applicant to meaningfully enhance the size, scope, speed, or technical ambition of the overall application. If the applicant cannot make this type of demonstration, it will have to show that the project would not occur without CHIPS funding.</span><span>&nbsp;</span></p></div>
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<div class="text">If we have a parent company, how should we provide consolidated financial statements and information for the financial model?</div>
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<div class="OutlineElement Ltr SCXW19706866 BCX0"><p class="Paragraph SCXW19706866 BCX0"><span lang="EN-US">As stated in the </span><a class="Hyperlink SCXW19706866 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, applicants should submit audited consolidated financial statements at fiscal year-end for each of the last two years, and interim financial statements for the current fiscal year. If the applicant entity does not have access to audited consolidated financial statements, they must explain why not.&nbsp;</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW19706866 BCX0"><p class="Paragraph SCXW19706866 BCX0"><span lang="EN-US">For the financial model, CPO is looking for a comprehensive assessment of the project’s finances. Therefore, the financial information, including the key income statement, cash flow statement, and balance sheet information, should reflect project-based financials. Applicants are encouraged, though not required, to use the </span><a class="Hyperlink SCXW19706866 BCX0" href="https://www.nist.gov/document/nofo2-financial-model-template"><span lang="EN-US">Financial Model Template</span></a><span lang="EN-US"> provided by CPO, which is designed to accommodate for reasonable, high-level estimates for the project that are acceptable.</span><span>&nbsp;</span></p></div>
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<div class="text">Will CPO advise whether a project is likely to receive funding for greater than 10% of the project’s capital expenditures?</div>
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<p><span lang="EN-US">Applicants will be informed after our merit review process whether they have been selected for an award or their application has been denied. If they are selected for an award, they will be offered a proposed award size as part of the award process. It is important to note that awards are expected to be 10% of project capital expenditures for most applications and will only be 20% or 30% in rare cases. In addition, if an applicant requests an award of more than 10% of project capital expenditures, the Department may offer an award for 10% of project capital expenditures contingent on the applicant demonstrating that the project will be able to close the funding gap and be commercially viable at that award amount.&nbsp;</span><span>&nbsp;</span></p>
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<div class="text">If I request 20% or 30% of capital expenditures in CHIPS Direct Funding and the Department decides not to award the requested amount, will my application be denied, or could I still be considered for an award of 10%?</div>
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<p><span lang="EN-US">If an applicant requests 20% or 30% of capital expenditures in CHIPS Direct Funding and the Department decides not to award the requested amount, the application may be denied or considered for an award of 10%, contingent on the applicant demonstrating that the project will be able to close the funding gap and be commercially viable at that award amount. It is important to note that CHIPS Direct Funding is expected to be 10% of project capital expenditures for most applications and 20% or 30% only in rare cases.</span><span>&nbsp;</span></p>
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<div class="nist-block text-long"><h2 class="nist-block__title"><span><span><span><span><a name="prog"></a>Program Priorities</span></span></span></span></h2></div>
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<div class="text">What are the Department of Commerce’s economic and national security objectives for investments made through the second funding opportunity?</div>
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<p><span><span><span>The Department has laid out three objectives for its investments in semiconductor materials and manufacturing equipment facilities: (1) strengthening supply chain resilience, (2) advancing U.S. technology leadership in semiconductor materials and manufacturing equipment, and (3) supporting vibrant U.S. fab clusters. For more detailed information, see “<a class="media-link-ga " data-entity-substitution="canonical" data-entity-type="media" data-entity-uuid="f0633a03-3a6a-42a7-9eb1-5a03029aab81" data-file-url="/system/files/documents/2023/09/29/Vision%20for%20Success-Facilities%20for%20Semiconductor%20Materials%20and%20Mfr%20Equipment.pdf" href="/document/vision-success-facilities-semiconductor-materials-and-manufacturing-equipment" title="Vision for Success: Facilities for Semiconductor Materials and Manufacturing Equipment">Vision for Success: Facilities for Semiconductor Materials and Manufacturing Equipment</a>.”</span></span></span></p>
<p><span><span><span>The Department recognizes that all three objectives are self-reinforcing and welcomes projects that support one or more of the objectives above. But for the second funding opportunity, the Department is particularly focused on the third goal: supporting vibrant U.S. clusters. If a project does not support a cluster, the application must make a compelling case for advancing one of the Department’s other two objectives.</span></span></span></p>
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<div class="text">My project is not part of a cluster. Should I still apply?</div>
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<p><span lang="EN-US">Through the </span><a class="Hyperlink SCXW187621581 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, the Department is particularly focused on projects that advance U.S. clusters. But the Department is open to projects that support any of the economic and national security objectives outlined in the NOFO and in the “</span><a class="Hyperlink SCXW187621581 BCX0" href="https://www.nist.gov/document/vision-success-facilities-semiconductor-materials-and-manufacturing-equipment"><span lang="EN-US">Vision for Success: Facilities for Semiconductor Materials and Manufacturing Equipment</span></a><span lang="EN-US">.” If a project does not support a cluster, the application must make a compelling case for advancing one of the Department’s other two objectives: strengthening supply chain resilience and/or advancing U.S. technology leadership.</span><span>&nbsp;</span></p>
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<div class="text">There’s no fab in my area. Can I still make the case that I am advancing a U.S. fab cluster?</div>
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<p><span><span><span>Yes. The Department is interested in projects that advance clusters by closing critical gaps in the U.S. supplier landscape. Often, projects will accomplish this goal by locating near fabs to reduce the burdens associated with transporting critical supply chain inputs. But that is not a requirement, and the Department welcomes projects that support clusters in other ways, including by providing critical materials or equipment to fabs in multiple areas. </span></span></span></p>
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<div class="text">What does it mean to advance a cluster?</div>
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<p><span><span><span>Through its investments in the semiconductor supply chain, the Department wants each CHIPS-funded cluster in the United States to be supported by dozens of suppliers, including many that will be investing in the United States for the first time to close critical gaps in the U.S. supplier ecosystem. For more details, see “<a href="https://www.nist.gov/document/vision-success-facilities-semiconductor-materials-and-manufacturing-equipment">Vision for Success: Facilities for Semiconductor Materials and Manufacturing Equipment</a>.”</span></span></span></p>
<p><span><span><span>Note that the Department does not intend to use CHIPS dollars to physically relocate existing facility infrastructure in the United States to another U.S. jurisdiction. Rather, the Department hopes CHIPS funding will incentivize suppliers—some of whom may currently have no footprint in the United States—to build new facilities or additional capacity to support U.S.-based clusters.</span></span></span></p>
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<div class="nist-block text-long"><h2 class="nist-block__title"><a name="elig"></a>Eligibility</h2></div>
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<div class="text">How do I know if I am eligible for funding as a semiconductor material or manufacturing equipment manufacturer?</div>
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<div class="OutlineElement Ltr SCXW234278766 BCX0"><p class="Paragraph SCXW234278766 BCX0"><span lang="EN-US">If you are applying to construct, expand, or modernize a semiconductor material or manufacturing equipment facility and your project’s capital investment falls below $300 million, then you are eligible under the Small-Scale Supplier NOFO, provided you meet the other statutory requirements for funding under the CHIPS Act. For more information, see Section I.B.1 (“What projects are eligible for funding under this NOFO?”) of NOFO 1 and Section I.B.2 (“What are the eligibility requirements for funding under this NOFO?”) of the </span><a class="Hyperlink SCXW234278766 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW234278766 BCX0"><p class="Paragraph SCXW234278766 BCX0"><span lang="EN-US">If you are applying to construct, expand, or modernize a semiconductor material or manufacturing equipment facility and your project’s capital investment equals or exceeds $300 million, then you are eligible under NOFO 1, provided you meet the other statutory requirements for funding under the CHIPS Act. For more information on NOFO 1, see </span><a class="Hyperlink SCXW234278766 BCX0" href="https://www.nist.gov/chips/notice-funding-opportunity-commercial-fabrication-facilities"><span lang="EN-US">CHIPS Incentives Program – Commercial Fabrication Facilities Notice of Funding Opportunity</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p></div>
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<div class="text">My project is below $20 million in capital investments. Should I apply?</div>
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<div class="OutlineElement Ltr SCXW99720076 BCX0"><p class="Paragraph SCXW99720076 BCX0"><span lang="EN-US">As stated in the </span><a class="Hyperlink SCXW99720076 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, the Department will not fund applications that lack sufficient scale to meaningfully contribute to its strategic objectives. The Department expects that projects with capital investments below $20 million are unlikely to meet this standard. If a sub-$20 million project does meet this standard, the Department generally expects other stakeholders—including chipmakers, larger suppliers, and state and local entities—to make the project viable without CHIPS funding.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW99720076 BCX0"><p class="Paragraph SCXW99720076 BCX0"><span lang="EN-US">In addition, the CHIPS Program Office intends to take steps to connect suppliers with credit providers of all sizes. This will include a dedicated effort within the CHIPS Investments Office as well as online tools to connect potential loan-seekers with a list of private-sector financial institutions, including direct lenders, banks, and asset managers. More information on these programs is forthcoming.</span><span>&nbsp;</span></p></div>
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<div class="text">My project is slightly more than $300 million in capital investments. Can I still apply under the Small-Scale Supplier NOFO?</div>
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<p><span lang="EN-US">No. If you are applying to construct, expand, or modernize a semiconductor material or manufacturing equipment facility and your capital investment equals or exceeds $300 million, you may not apply for funding under the </span><a class="Hyperlink SCXW155916460 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">. You may apply under </span><a class="Hyperlink SCXW155916460 BCX0" href="https://www.nist.gov/chips/notice-funding-opportunity-commercial-fabrication-facilities"><span lang="EN-US">NOFO 1</span></a><span lang="EN-US">, provided you meet the other statutory requirements for funding under the CHIPS Act. The Department strongly advises applicants not to inflate or deflate capital investments for the purposes of NOFO eligibility, as the Department will be evaluating applicants based on the comprehensiveness and reasonableness of the projected capital expenditures.</span><span>&nbsp;</span></p>
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<div class="text">I am a raw material supplier. Am I eligible under the second funding opportunity?</div>
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<div class="OutlineElement Ltr SCXW45732377 BCX0"><p class="Paragraph SCXW45732377 BCX0"><span lang="EN-US">As defined in this funding opportunity, semiconductor materials facilities are facilities for the manufacture or production of materials used to manufacture semiconductors, which are the chemicals, gases, raw and intermediate materials, and other consumables used in semiconductor manufacturing (emphasis added). Potential applications related to raw semiconductor materials facilities may apply for funding so long as the capital investment falls below $300 million, provided they meet the other eligibility requirements in the funding opportunity.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW45732377 BCX0"><p class="Paragraph SCXW45732377 BCX0"><span lang="EN-US">Ultimately, applications will be evaluated based on the extent to which they meet the evaluation criteria laid out in the </span><a class="Hyperlink SCXW45732377 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, including the extent to which the application addresses the program’s economic and national security objectives.</span><span>&nbsp;</span></p></div>
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<div class="text">I am a supplier to a supplier. Am I eligible under the second funding opportunity?</div>
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<div class="OutlineElement Ltr SCXW17252276 BCX0"><p class="Paragraph SCXW17252276 BCX0"><span lang="EN-US">As defined in the second funding opportunity, semiconductor materials facilities include facilities that manufacture or produce raw and intermediate materials, and semiconductor manufacturing equipment facilities include facilities that produce the subsystems that enable or are incorporated into manufacturing equipment. These suppliers to a supplier may apply for funding so long as their capital investment falls below $300 million, provided they meet the other eligibility requirements in the funding opportunity.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW17252276 BCX0"><p class="Paragraph SCXW17252276 BCX0"><span lang="EN-US">Ultimately, applications will be evaluated based on the extent to which they meet the evaluation criteria laid out in the </span><a class="Hyperlink SCXW17252276 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, including the extent to which the application addresses the program’s economic and national security objectives.</span><span>&nbsp;</span></p></div>
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<div class="text">I am a supplier that primarily serves a non-semiconductor-related industry. Am I eligible to apply?</div>
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<div class="OutlineElement Ltr SCXW188496118 BCX0"><p class="Paragraph SCXW188496118 BCX0"><span lang="EN-US">If you are a potential applicant for a project related to a semiconductor material facility or a semiconductor manufacturing equipment facility—as these facilities are defined in the Notice of Funding Opportunity, see Section I.B.1 of the </span><a class="Hyperlink SCXW188496118 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">—then you are eligible to apply for funding even if a portion of your business is not related to semiconductors.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW188496118 BCX0"><p class="Paragraph SCXW188496118 BCX0"><span lang="EN-US">Please note, however, that our evaluation of the merits of a supply chain project will take into account the materiality of the project’s semiconductor-related output, relative to both overall project size and to the U.S. semiconductor ecosystem as a whole.</span><span>&nbsp;</span></p></div>
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<div class="nist-block text-long"><h2 class="nist-block__title"><span><span><span><span><a name="app"></a>Application Logistics</span></span></span></span></h2></div>
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<div class="text">I am seeking funding for multiple projects. Can I submit them all in one application?</div>
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<p><span lang="EN-US">For the purposes of the </span><a class="Hyperlink SCXW251559909 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, applicants may include only one project per application. A “project” is defined as a set of capital expenditures for the construction, expansion, or modernization of a single facility. If you are seeking funding for multiple projects, you must submit a separate application for each project.</span><span>&nbsp;</span></p>
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<div class="text">Do I need to submit a statement of interest before applying?</div>
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<p><span lang="EN-US">Applicants that have not already submitted a statement of interest to the Department are not required to do so before submitting a Concept Plan under the </span><a class="Hyperlink SCXW208228157 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US"> but may still do so if desired.</span><span>&nbsp;</span></p>
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<div class="nist-block text-long"><h2 class="nist-block__title"><span><span><span><span><a name="cons"></a>Consortium Logistics</span></span></span></span></h2></div>
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<div class="text">How do I apply as part of a consortium?</div>
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<div class="OutlineElement Ltr SCXW175401496 BCX0"><p class="Paragraph SCXW175401496 BCX0"><span lang="EN-US">Applying as part of a consortium during the Full Application phase will be a similar process as the Concept Plan phase. Each member of a consortium seeking funding for a project eligible for CHIPS Incentives must submit their own separate Concept Plan and Full Application. As part of the Full Application, consortium applicants will be asked to submit a “consortium narrative” detailing other members of the consortium and setting forth the overall strategic vision of the consortium, among other relevant information. Applicants that are part of the same consortium should submit the same information in their consortium narrative.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW175401496 BCX0"><p class="Paragraph SCXW175401496 BCX0"><span lang="EN-US">Funding will be awarded on a per-project basis to consortium members proposing to construct, expand, or modernize a facility eligible under this funding opportunity. For more information, see Sections I.B.4 (“May applicants apply for funding under this NOFO as part of a consortium, and if so, how?”) and IV.G.2 and IV.H.2 (“Consortium Narrative”) of the </span><a class="Hyperlink SCXW175401496 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p></div>
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<div class="text">Will the consortium receive funding as a whole?</div>
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<p><span lang="EN-US">Funding will be awarded on a per-project basis to consortium members proposing to construct, expand, or modernize a facility eligible under the </span><a class="Hyperlink SCXW110127398 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p>
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<div class="text">Is the Department requiring consortia to have particular members?</div>
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<p><span><span><span>No. However, the Department expects that strong consortia will include at least two suppliers, a state or local government entity, and an anchor institution such as a semiconductor fab. Other members may include workforce training providers, labor unions, economic development corporations, institutions of higher education, philanthropic foundations, industry organizations, Tech Hubs, or other relevant entities</span></span></span></p>
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<div class="text">What information do I need to submit about my consortium?</div>
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<p><span lang="EN-US">Applying as part of a consortium during the Full Application phase will be a similar process to the Concept Plan phase. Consortium applicants will be asked to submit a “consortium narrative” detailing other members of the consortium and setting forth the overall strategic vision of the consortium, among other relevant information. Applicants should also take care to submit information addressing the incremental requirements for the Full Application consortium narrative, which includes (1) if applicable, any documentation and evidence of the planned operating model, such as the governance structure, decision-making authority/rights, contractual obligations, financial obligations, roles and responsibilities, and any memoranda of understanding, and (2) letters of commitment attached from all entities responsible for executing portions of the proposed scope of work. For consortium applicants, this includes letters from other applicants in the consortium confirming their participation in the consortium. &nbsp;For more information, see Sections IV.H.2 (“Consortium Narrative”) of the </span><a class="Hyperlink SCXW24763158 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">. If there have been no updates, consortium members may simply resubmit the narrative they submitted as part of the Concept Plan.</span><span>&nbsp;</span></p>
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<p><span><span><span>There is no specific floor or ceiling for the number of projects that may be included as part of a consortium. However, in evaluating projects submitted as part of a consortium, the Department will consider the extent to which the consortium’s strategic vision advances economic and national security, and the extent to which a given project is necessary for achieving that vision. Thus, the Department strongly encourages consortia to be selective in choosing projects.</span></span></span></p>
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<div class="text">What are the benefits to applying as part of a consortium?</div>
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<div class="OutlineElement Ltr SCXW108956910 BCX0"><p class="Paragraph SCXW108956910 BCX0"><span lang="EN-US">Whether a project meaningfully contributes to the development or sustainability of a cluster is a factor the Department may use to advance Concept Plans to the Full Application phase or to select a Full Application to receive an award. We generally expect applicants applying as part of consortia to be better positioned to make this showing.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW108956910 BCX0"><p class="Paragraph SCXW108956910 BCX0"><span lang="EN-US">In addition, applicants applying as part of a consortium may work together to satisfy various statutory eligibility and other requirements. For more information, see Section I.B.5 (“Are there any benefits to applying as part of a consortium?”) of the </span><a class="Hyperlink SCXW108956910 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p></div>
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<p><span><span><span>State or local government entities that join consortia are strongly encouraged to take steps to build and support vibrant semiconductor clusters. Such steps might include investments in workforce, education, site preparation, research and development, or infrastructure (including transportation, housing, water, or energy) designed to benefit both the consortia members and the broader community. State and local government entities in consortia are also strongly encouraged to help streamline access to resources critical to cluster growth, such as permitting and expansion services, and coordination with relevant regulatory authorities.&nbsp;&nbsp;&nbsp; </span></span></span></p>
<p><span><span><span>For consortia that include a state and/or local government entity, the “consortium narrative” should list any actions that entity is taking or intends to take to facilitate cluster development.</span></span></span></p>
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<div class="OutlineElement Ltr SCXW47377734 BCX0"><p class="Paragraph SCXW47377734 BCX0"><span lang="EN-US">No. Each member of a consortium that seeks CHIPS funding for a project eligible under the</span><a class="Hyperlink SCXW47377734 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US"> Small-Scale Supplier NOFO</span></a><span lang="EN-US"> will have to submit their own Concept Plan and Full Application. They will not be required to share business confidential information with other members of the consortium.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW47377734 BCX0"><p class="Paragraph SCXW47377734 BCX0"><span lang="EN-US">In addition, the CHIPS Program Office (CPO) recognizes the importance of protecting confidential business information from public disclosure. CPO and the Department will follow applicable laws, including, for example, the CHIPS Act, the Trade Secrets Act, and the Freedom of Information Act (FOIA), to protect such information.</span><span>&nbsp;</span></p></div>
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<div class="OutlineElement Ltr SCXW160551817 BCX0"><p class="Paragraph SCXW160551817 BCX0"><span lang="EN-US">Broadly speaking, a cluster describes the kind of regional semiconductor ecosystem the Department aims to create and support, while a consortium describes a collection of entities that work together to encourage the growth of such regions.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW160551817 BCX0"><p class="Paragraph SCXW160551817 BCX0"><span lang="EN-US">Specifically, the Department has defined a cluster as a geographically compact area with multiple commercial-scale fabs owned and operated by one or more companies; a large, diverse, and skilled workforce; nearby suppliers to the semiconductor industry; R&amp;D facilities; utilities; and specialized infrastructure, such as chemical processing and water treatment facilities.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW160551817 BCX0"><p class="Paragraph SCXW160551817 BCX0"><span lang="EN-US">For the purposes of the </span><a class="Hyperlink SCXW160551817 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, applicants that claim to support clusters are strongly encouraged to consider applying as part of a consortium. The Department expects that strong consortia will include at least two suppliers, a state or local government entity, and an anchor institution such as a semiconductor fab. Other members may include workforce training providers, labor unions, economic development corporations, institutions of higher education, philanthropic foundations, industry organizations, Tech Hubs, or other relevant entities.</span><span>&nbsp;</span></p></div>
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<div class="text">The Department expects that strong consortia will include an anchor institution such as a semiconductor fab. What are other examples of anchor institutions?</div>
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<p><span><span><span>In addition to semiconductor fabs, anchor institutions could include large suppliers, universities, and/or advanced packaging facilities. In addition to anchor institutions, strong consortia will also include at least two suppliers and a state or local government entity and may include entities such as workforce training providers, labor unions, economic development corporations, institutions of higher education, philanthropic foundations, industry organizations, Tech Hubs, or other relevant entities.</span></span></span></p>
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<div class="text">What letters of commitment are required for consortium applicants as part of the consortium narrative?</div>
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<p><span>Pursuant to Section IV.H.2 of the </span><a class="media-link-ga " data-entity-substitution="canonical" data-entity-type="media" data-entity-uuid="15317b02-6b7e-4300-be36-eca6e618867a" data-file-url="/system/files/documents/2024/08/27/CHIPS%20-%20Facilities%20for%20Semiconductor%20Materials%20and%20Manufacturing%20Equipment%20NOFO.pdf" href="/document/chips-incentives-program-facilities-semiconductor-materials-and-manufacturing-equipment" title="CHIPS Incentives Program – Facilities for Semiconductor Materials and Manufacturing Equipment"><span>Small-Scale Supplier NOFO</span></a><span>, each consortium applicant must attach a letter from any other consortium member (including, potentially, other consortium applicants) responsible for executing portions of the applicant’s proposed scope of work. Consortium applicants who are not relying on another member of the consortium to execute a portion of the proposed scope of work are not required to include any letters pursuant to this requirement.&nbsp;</span></p>
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<div class="nist-block text-long"><h2 class="nist-block__title"><span><span><span><span><a name="work"></a>Workforce</span></span></span></span></h2></div>
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<p><span><span><span>Applicants whose projects involve more than an incidental amount of construction will be required to discuss their strategy for investing in their construction workforce. That strategy must include a workforce needs assessment; a recruitment, retention, and training approach; a job quality approach; and metrics and milestones. Applicants will also need to address whether they commit to using project labor agreements. If they do not so commit, the Department will need to understand what other measures they intend to take to ensure workforce continuity and reduce the risk of delays in project delivery.</span></span></span></p>
<p><span><span><span>As part of their workplan, applicants are strongly encouraged to describe any steps that will be taken to ensure that all contractors and subcontractors—including subcontract labor providers—have and will continue to have a strong record of compliance with all Federal labor laws, including but not limited to all relevant provisions, rules, and regulations of the Davis-Bacon Act, Executive Order 11246, and the Occupational Safety and Health Act, and the steps that will be taken to prevent the misclassification of workers. Strong applications will also demonstrate that contractors and subcontractors have a strong record of compliance with applicable state and local laws.</span></span></span></p>
<p><span><span><span>The Department encourages applicants to use independent compliance monitors to ensure compliance with applicable laws and regulations. Compliance monitors can include law firms that specialize in monitoring compliance with contracts and settlements and/or labor organizations that represent construction workers.&nbsp;</span></span></span></p>
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<div class="nist-block text-long"><h2 class="nist-block__title"><span><span><span><span><a name="awa"></a>Award Sizing</span></span></span></span></h2></div>
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<p><span lang="EN-US">The CHIPS Program Office anticipates allocating up to $500 million for this funding opportunity. Each project will be evaluated on its own merits and reviewed in light of the evaluation criteria and prioritization and selection factors detailed in the </span><a class="Hyperlink SCXW153210087 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, as well as in light of CPO’s overall portfolio constraints. For more information on the CHIPS Program Office’s investment goals, see the “</span><a class="Hyperlink SCXW153210087 BCX0" href="https://www.nist.gov/chips/vision-success-facilities-semiconductor-materials-and-manufacturing-equipment"><span lang="EN-US">Vision for Success: Facilities for Semiconductor Materials and Manufacturing Equipment</span></a><span lang="EN-US">” released in June 2023.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">Applicants may only apply for incentives that equal 10, 20, or 30 percent of total project capital expenditures. Most CHIPS Direct Funding awards under the </span><a class="Hyperlink SCXW22844015 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US"> will be equal to 10 percent of project capital expenditures. In rare cases, applicants may receive an award of equal to either 20 percent or 30 percent of project capital expenditures if they (a) make a particularly compelling case that their project advances the Department’s economic and national security objectives, and (b) demonstrate that the additional funding is necessary to make the project commercially viable. Additionally, applicants must explain how they would execute the project in the event that they only receive 10 percent of project capital expenditures. Projects eligible for the Advanced Manufacturing Investment Credit will only receive an award of either 10 percent or 20 percent of project capital expenditures.</span><span>&nbsp;</span></p>
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<p><span lang="EN-US">If an applicant requests more than 10 percent in CHIPS Direct Funding, the Department expects that it may take substantially longer to evaluate the Full Application and prepare an award. In addition, the applicant will need to make a particularly compelling case that their project advances the Department’s economic and national security objectives and that additional funding is necessary to make the project commercially viable. Applicants must also explain how they would execute the project in the event that they only receive 10 percent of project capital expenditures.</span><span>&nbsp;</span></p>
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<p><span><span><span>It is generally expected that most direct funding awards will equal 10 percent of project capital expenditures. In rare cases, applicants may receive an award of either 20 percent or 30 percent if they make a particularly compelling case that their project advances the Department’s economic and national security objectives and that additional funding is necessary to make the project commercially viable. </span></span></span></p>
<p><span><span><span>Projects that are eligible for the Investment Tax Credit will not receive an award of more than 20 percent of project capital expenditures. In other words, projects may only receive an award of 30 percent of capital expenditures if they are not eligible for the Investment Tax Credit. </span></span></span></p>
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<p><span lang="EN-US">No, the </span><a class="Hyperlink SCXW55066025 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US"> offers awards only in the form of direct funding. However, the Department intends to facilitate opportunities to increase access to credit for smaller suppliers by connecting suppliers with credit providers of all sizes. This will include a dedicated effort within the CHIPS Investments Office as well as online tools to connect potential loan-seekers with a list of private-sector financial institutions, including direct lenders, banks, and asset managers. More information on these programs is forthcoming.</span><span>&nbsp;</span></p>
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<div class="nist-block text-long"><h2 class="nist-block__title"><strong><span><span><a name="state"></a>For States and Local Governments</span></span></strong></h2></div>
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<div class="text">What types of supply chain projects is the CHIPS Program Office looking to support?</div>
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<div class="OutlineElement Ltr SCXW40763314 BCX0"><p class="Paragraph SCXW40763314 BCX0"><span lang="EN-US">As detailed in the </span><a class="Hyperlink SCXW40763314 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, examples of project attributes that are aligned with the goals of the Department include but are not limited to the following:</span><span>&nbsp;</span></p></div><div class="ListContainerWrapper SCXW40763314 BCX0"><ul type="disc"><li><p class="Paragraph SCXW40763314 BCX0"><span lang="EN-US">Projects that create capacity for inputs that are chokepoint risks for regional semiconductor manufacturing clusters, fabrication partners, or the United States as a whole.</span></p></li><li><p class="Paragraph SCXW40763314 BCX0"><span lang="EN-US">Projects that provide key inputs, assets, or infrastructure that contribute to the creation or development of a self-sustaining, vibrant regional semiconductor manufacturing cluster.</span></p></li><li><p class="Paragraph SCXW40763314 BCX0"><span lang="EN-US">Projects that onshore/re-shore a technology, commodity, material, or equipment with geographic concentration risk.</span></p></li><li><p class="Paragraph SCXW40763314 BCX0"><span lang="EN-US">Projects that demonstrate advanced technological capabilities (in terms of production or end-product).</span><span>&nbsp;</span></p></li></ul></div>
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<div class="OutlineElement Ltr SCXW119722509 BCX0"><p class="Paragraph SCXW119722509 BCX0"><span lang="EN-US">State and local government participation in consortia is strongly encouraged. State and local entities can help provide convening capacity, enabling policies, infrastructure, financing, and implementation assistance to support growth of a semiconductor manufacturing cluster, including, but not limited to, cluster governance, workforce development services, water and energy provision, permitting support, and research and development funds. In addition, state and local government entities, including economic development organizations, can organize recruitment of companies to participate in the consortia, helping to ensure that consortia applicants also reflect their region’s economic development priorities.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW119722509 BCX0"><p class="Paragraph SCXW119722509 BCX0"><span lang="EN-US">The </span><a class="Hyperlink SCXW119722509 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US"> identifies three main strategic objectives, including a particular focus on supporting vibrant U.S. fab clusters. The Department generally expects that applicants applying as part of a consortia will be better positioned to show how a project meaningfully contributes to the development or sustainability of a cluster. The Department is interested in applications for semiconductor material and equipment facilities that advance clusters by closing critical gaps in the U.S. supplier landscape, for example by reducing the burdens associated with transporting critical supply chain inputs.&nbsp;&nbsp;</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW119722509 BCX0"><p class="Paragraph SCXW119722509 BCX0"><span lang="EN-US">For consortia that include a state and/or local government entity, the “consortium narrative” should list any actions that entity is taking or intends to take to facilitate cluster development.</span><span>&nbsp;</span></p></div>
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<div class="text">Apart from participating in consortia, how can state and local governments support entities apply for CHIPS Incentives under the CHIPS Small-Scale Supplier NOFO?</div>
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<div class="OutlineElement Ltr SCXW263311462 BCX0"><p class="Paragraph SCXW263311462 BCX0"><span lang="EN-US">As stated in the </span><a class="Hyperlink SCXW263311462 BCX0" href="https://www.nist.gov/document/chips-facilities-semiconductor-materials-and-manufacturing-equipment-nofo"><span lang="EN-US">Small-Scale Supplier NOFO</span></a><span lang="EN-US">, entities invited to submit a Full Application will need a letter from a state or local government offering a qualifying covered incentive in order to be eligible for an award. The state or local incentive must be offered in the state or locality where the project is located, and for the purposes of attracting the construction, expansion, or modernization of the facility. (For consortium members, this requirement may be satisfied by one letter that offers an incentive to all eligible facilities in the consortium being proposed for construction, expansion, or modernization. Note, however, that the Department will also accept multiple letters.) The Department encourages projects that include state and local incentive packages capable of creating spillover benefits that improve regional economic resilience and support a robust semiconductor ecosystem, beyond assisting a single entity. Such incentives might include investments in workforce, education, site preparation, or infrastructure (including transit or utilities) that are not limited to the applicant, but rather designed to benefit both the applicant and the broader community. Likewise, the Department will place less weight on incentives (such as direct tax abatements) with less potential for spillover benefits. For more information on covered incentives, please refer to </span><a class="Hyperlink SCXW263311462 BCX0" href="https://www.nist.gov/document/chips-intersection-states"><span lang="EN-US">this document</span></a><span lang="EN-US">.</span><span>&nbsp;</span></p></div><div class="OutlineElement Ltr SCXW263311462 BCX0"><p class="Paragraph SCXW263311462 BCX0"><span lang="EN-US">States and local governments are also encouraged to work with the CHIPS Program Office on identifying and indicating their support for supply chain entities who may be strong candidates for CHIPS funding. During the Concept Plan phase, states and local jurisdictions can help identify supply chain companies by writing a letter of support to the CHIPS Program Office explaining why a supply chain entity is important to its semiconductor ecosystem. Such letters will be considered as part of the CHIPS Program’s Office determination of the extent to which a project advances U.S. economic and national security by supporting vibrant U.S. fab clusters, strengthening supply chain resilience, and/or advancing U.S. technology leadership.&nbsp; The strongest letters are specific in terms of the value the applicant will bring to the ecosystem and will showcase the tangible things the state or local government is doing to support the applicant.</span><span>&nbsp;</span></p></div>
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<p class="MsoBodyText"><span><span>A strong letter of support from a state or local government would include the following, among other possibilities:</span></span></p>
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<li><span><span>Discussion of the state or locality’s involvement in attraction efforts for the project and future plans to facilitate the construction, modernization, and/or expansion of the facility.</span></span></li>
<li><span><span>Discussion of how the project is particularly well-aligned with local and/or state economic development priorities and semiconductor industry strategy.</span></span></li>
<li><span><span>Discussion of any local and/or state funding or other direct support for the project. </span></span></li>
<li><span><span>Discussion of other state or local investments that will facilitate successful implementation of the project, including workforce development, research and development, infrastructure, and permitting support. </span></span></li>
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<a href="/topic-terms/electronics" hreflang="en">Electronics</a>, <a href="/topic-terms/semiconductors" hreflang="en">Semiconductors</a>, <a href="/topic-terms/manufacturing" hreflang="en">Manufacturing</a> and <a href="/topic-terms/materials" hreflang="en">Materials</a></div>
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Created September 29, 2023, Updated August 27, 2024
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